BACUS, officially known as the SPIE/BACUS Photomask Symposium, held an all-day session on electron beam direct write.
My overall impression of this special session was that there has been excellent progress on direct write (or “maskless”) pattern generation. However, it is clear that there remain important unresolved issues.
Sematech’s position (Stefan Wurm) is that there is no supporting infrastructure, in particular there is no clear solution for pattern inspection. We are accustomed to inspecting every feature on masks. But the mask is replicated many times without inspecting every feature on the wafers. In the case of direct write, must we inspect every feature on every wafer? This is clearly impossible. Thus Sematech now pursues multi-beam mask write in support of EUV.
As if in answer, Wolfgang Staud (Applied Materials) reported on the multi-column inspection tool being built in Germany. The current challenges include data transfer and data compaction.
Data handling was also addressed by Tor-Björn Sandström (Micronic), albeit for patterning rather than inspection. He reported that Micronic and ASML decided not to proceed with a 65 nm direct write laser PG because of data handling issues. He extrapolates to the 16 nm node, and claims that in order to displace EUV, one needs to transfer 160 Tpixel / second (160 * 10^12) in gray scale. Already at the 65 nm node, Micronic could not transfer data fast enough to compete with optical scanners.
At the same time, Berglund (consultant), Aki Fujimura (D2S), and Akio Yamada (Advantest) all argued that for small wafer volumes, direct write will be economical and will continue to be used. None of these talks addressed the issue of pattern inspection. Indeed, does e-Shuttle perform full pattern inspection on wafer production now? Did previous ASIC and custom direct write fabs perform full pattern inspection?
Perhaps these issues of data handling and pattern inspection are over-estimated now.